Question

Construct a combinatorial circuit using inverters, OR gates, and AND gates that produces the output$\left(\left(\mathbf{\neg }\mathbf{p}\vee \mathbf{\neg }\mathbf{r}\right)\wedge \mathbf{\neg }\mathbf{q}\right)\vee \left(\mathbf{\neg }\mathbf{p}\wedge \left(\mathbf{q}\vee \mathbf{r}\right)\right)$ from input bits p,qand r

Short answer

The combinatorial circuit is obtained using inverters, OR gates, and AND gates that produces the output \(\left( {\left( {\neg {\rm{p}} \vee \neg {\rm{r}}} \right) \wedge \neg {\rm{q}}} \right) \vee \left( {\neg {\rm{p}} \wedge \left( {{\rm{q}} \vee {\rm{r}}} \right)} \right)\) from input bits \({\rm{p,q}}\)and \({\rm{r}}\). For this, four inverters, three OR gates and two AND gates are required. For disjunction, OR gate is used while for conjunction AND gate is used.

Step-by-step solution

Definition of inverters, OR gates, and AND gates 

Aninverter,often known as a NOT gate, is a logic gate that performs logical negation.

AnOR gateis a type of digital logic gate that outputs one if any one of its inputs equals one, else it outputs zero.

AnAND gateis a type of electrical circuit that integrates two inputs and turns on the output while both inputs are present.

Construction of a combinatorial circuit ¬p∨¬r∧¬q∨¬p∧q∨r

Take three inputs such as \({\rm{p,q}}\)and \({\rm{r}}\).

The given logical expression is \(\left( {\left( {\neg {\rm{p}} \vee \neg {\rm{r}}} \right) \wedge \neg {\rm{q}}} \right) \vee \left( {\neg {\rm{p}} \wedge \left( {{\rm{q}} \vee {\rm{r}}} \right)} \right)\).

The negation of\({\rm{p,q}}\)and\({\rm{r}}\)are denoted by\(\neg {\rm{p}},\neg {\rm{q}},\)and \(\neg {\rm{r}}\)respectively.

The disjunction and conjunction are represented by the symbol\( \vee \)and\( \wedge \)respectively.

For this, take the inputs from the left, and in certain cases, they are going via an inverter to generate their negations. Some pairs of them are fed into OR gates, and the outcomes of these and other negated inputs are fed into AND gates. The outputs of these AND gates are directed to the last OR gate.

Combinational Logic Circuit

Therefore, the output \(\left( {\left( {\neg {\rm{p}} \vee \neg {\rm{r}}} \right) \wedge \neg {\rm{q}}} \right) \vee \left( {\neg {\rm{p}} \wedge \left( {{\rm{q}} \vee {\rm{r}}} \right)} \right)\) is obtained by using the inverters, OR gates, and AND gates.