Question

Assume that our MAR contains 20 bits, enabling us to access up to \(2^{20}\) memory cells, which is \(1 \mathrm{MB}\), but our computer has \(4 \mathrm{MB}\) of memory. Explain how it might be possible to address all \(4 \mathrm{MB}\) memory cells using a MAR that contains only 20 bits.

Short answer

Use bank switching or paging to manage memory blocks beyond MAR's 20-bit limit.

Step-by-step solution

Understanding the Problem

We need to address 4 MB of memory using only 20 bits in the Memory Address Register (MAR). A MAR with 20 bits can address up to \(2^{20} = 1,048,576\) cells (1 MB). Thus, we must find a way to extend our addressing capability beyond these 20 bits.

Recognizing the Limitation

The MAR is limited to 20 bits, hence, it can only create unique addresses for 1 MB of the memory space at any time. However, our computer has a total of 4 MB, requiring an effective way to manage or expand the addressing capability using the existing 20-bit MAR.

Using Bank Switching or Paging

To address all 4 MB, we can use techniques such as bank switching or paging. These involve dividing the memory into blocks (or banks/pages) that the 20-bit MAR can address individually. Each block is mapped in and out of a predefined address space as needed.

Implementing a Scheme

Implement bank switching or paging by adding a small set of extra control bits outside the MAR for bank selection. For instance, 2 additional control bits can be used to select among the 4 memory blocks (each of 1 MB), effectively creating an address space of 4 MB by switching between these blocks.

Key concepts

MAR (Memory Address Register)

The Memory Address Register, often abbreviated as MAR, is a crucial component in computer architecture. Think of the MAR as a specific location where the CPU stores the address of the next piece of data it wants to fetch from memory.

Generally, the MAR is designed to hold the memory address in binary form. For example, if the MAR has 20 bits, it can encode up to \(2^{20}\) unique addresses, each pointing to a specific memory cell. This capability allows you to access up to 1 megabyte (MB) of memory.

• It temporarily holds the address in the memory where the CPU needs to read or write data.
• The number of bits in the MAR determines the potential maximum addressable space.
• As seen in the problem above, while the MAR in our example can address 1 MB, there are strategies that allow us to use it for more, such as using bank switching or paging systems.

Bank Switching

Bank switching is a clever technique employed to extend the range of memory accessible by the CPU, beyond what is directly possible with a given number of address bits in the MAR.

The idea is simple: divide the total memory into "banks" or chunks. Each bank is the size that the MAR can address (e.g., 1 MB in this case). By using extra bits to select which bank is currently accessible by the CPU, you can significantly increase the total accessible memory.

• Imagine placing switches to flip between different memory banks, thereby making parts of larger memory accessible.
• Whether you're using physical switches or control bits set by the program, you're essentially telling the MAR "look at this section now."
• This technique is particularly useful in systems with limited hardware but needing to support more substantial memory sizes.

Paging

Paging is another memory management technique often used alongside or instead of bank switching to address a larger memory size efficiently. It involves segmenting the memory into fixed-size pages, which the system can map in and out as needed.

Pagging differs from bank switching in that it is more about virtual memory management. Each page typically corresponds to a specific section of physical memory, with the help of a page table to keep track of their actual locations.

• Small "control" bits or metadata determine which pages are accessible at any given time, similar to bank switching.
• Paging allows for non-contiguous memory allocation, reducing fragmentation issues.
• It creates virtual address spaces, providing an easy way to manage programs that require more memory than what's physically available.

Paging and bank switching both solve the same core problem of memory limitations, though in different ways, providing flexibility and efficiency in managing and using large amounts of memory.