Question

Question: When silicon chips are fabricated, defects in materials (e.g., silicon) and manufacturing errors can result in defective circuits. A very common defect is for one wire to affect the signal in another. This is called a cross-talk fault. A special class of cross-talk faults is when a signal is connected to a wire that has a constant logical value (e.g., a power supply wire). In this case we have a stuck-at-0 or a stuckat-1 fault, and the affected signal always has a logical value of 0 or 1, respectively. The following problems refer to bit 0 of the Write Register input on the register fi le in Figure 4.24. 4.6.1 [10] Let us assume that processor testing is done by filling the PC, registers, and data and instruction memories with some values (you can choose which values), letting a single instruction execute, then reading the PC, memories, and registers. These values are then examined to determine if a particular fault is present. Can you design a test (values for PC, memories, and registers) that would determine if there is a stuck-at-0 fault on this signal? 4.6.2 [10] Repeat 4.6.1 for a stuck-at-1 fault. Can you use a single test for both stuck-at-0 and stuck-at-1? If yes, explain how; if no, explain why not. 4.6.3 [60] If we know that the processor has a stuck-at-1 fault on this signal, is the processor still usable? To be usable, we must be able to convert any program that executes on a normal MIPS processor into a program that works on this processor. You can assume that there is enough free instruction memory and data memory to let you make the program longer and store additional data. Hint: the processor is usable if every instruction “broken” by this fault can be replaced with a sequence of “working” instructions that achieve the same effect. 4.6.4 [10] Repeat 4.6.1, but now the fault to test for is whether the “MemRead” control signal becomes 0 if RegDst control signal is 0, no fault otherwise. 4.6.5 [10] Repeat 4.6.4, but now the fault to test for is whether the “Jump” control signal becomes 0 if RegDst control signal is 0, no fault otherwise.

Short answer

4.6.1

It is needed to execute the MIPS instruction “ADDI $1, zero, 128”, which can be placed the value of 128 into “$1”.

The value “128” has all of the bits at zero, but bit 7 has not at zero.

So, if bit 7 of the instruction is stuck at zero then the $1 will become zero.

4.6.2

It can’t be possible to do the test “stuck-at-zero” and “stuck-at-one” at the same signal by using only one instruction.

4.6.3

It is needed to find all of the instructions that have the value of “0” in the offset or immediate bit operand and that is to get the replacement of the instruction sequence “safe”.

4.6.4

If the “MemRead” is stuck at zero, then the data memory is read for each instruction. And for the non-load instructions, the Mux discards the memory- value that can select the value to be written in the unit of register.

4.6.5

If the “jump” is stuck-at-one, the PC is updated by each instruction as if this were in the “jump” instruction.

To do the test for this kind of fault, an ADDI can be executed with an immediate operand of non-zero.

If the “jump” is stuck-at-one, after the execution of “ADDI” the PC will not point to the following instructions of the “ADDI”.

Step-by-step solution

Define the concept.

4.6.1

To test for a stuck-at-0 fault on this signal,

It is needed to put an instruction so the signal to the value of “1” and can produce another result if the value on the signal is a stuck-at-0 fault

In bit number 7 of the instruction, the word is used for representing the immediate/offset.

Hence, it is needed to execute the MIPS instruction “ADDI $1, zero, 128”, which can be placed the value of 128 into “$1”.

The value “128” has all of the bits at zero, but bit 7 has not at zero.

So, if bit 7 of the instruction is stuck at zero then the $1 will become zero.

4.6.2

To do the “stuck-at-zero” test set the required instructions signal to “1” and to do the “stuck-at-one” test set the required instructions signal to “0”.

As the signal can be either 0 or 1 at the same cycle,

It can’t be possible to do the test “stuck-at-zero” and “stuck-at-one” at the same signal by using only one instruction.

To do the test “stuck-at-one” is analogous to the test “stuck-at-zero”

It can be used the instruction “ADDI $1, zero, 0” that can able to put the value of “0” in the “$1”.

So, if bit 7 of the instruction is stuck at one then, the immediate operand will become “128” and “$1” turns into 128, but the 0 will not turn into.

4.6.3

This is quite complex to work around with this kind of fault.

First of all, it is needed to find all of the instructions that have the value of “0” in the offset or immediate bit operand and that is to get the replacement of the instruction sequence “safe”.

4.6.4

If the “MemRead” is stuck at zero, then the data memory is read for each instruction. And for the non-load instructions, the Mux discards the memory- value that can select the value to be written in the unit of register.

As the outcome, the desired design can’t be possible for this kind of test due to this specified fault. The reason for this is that still the processor operates properly.

4.6.5

If the “jump” is stuck-at-one, the PC is updated by each instruction as if this were in the “jump” instruction.

To do the test for this kind of fault, an ADDI can be executed with an immediate operand of non-zero.

If the “jump” is stuck-at-one, after the execution of “ADDI” the PC will not point to the following instructions of the “ADDI”.

Determine the calculation.

4.6.1

Let’s consider that the testing of the processor is done by padding with the values of the PC, the register, the data, and the instruction.

To test for a stuck-at-0 fault on this signal,

It is needed to put an instruction so the signal to the value of “1” and can produce another result if the value on the signal is a stuck-at-0 fault

In bit number 7 of the instruction, the word is used for representing the immediate/offset.

Hence, it is needed to execute the MIPS instruction “ADDI $1, zero, 128”, which can be placed the value of 128 into “$1”.

The value “128” has all of the bits at zero, but bit 7 has not at zero.

So, if bit 7 of the instruction is stuck at zero then the $1 will become zero.

4.6.2

To do the “stuck-at-zero” test set the required instructions signal to “1” and to do the “stuck-at-one” test set the required instructions signal to “0”.

As the signal can be either 0 or 1 at the same cycle,

It can’t be possible to do the test “stuck-at-zero” and “stuck-at-one” at the same signal by using only one instruction.

To do the test “stuck-at-one” is analogous to the test “stuck-at-zero”

It can be used the instruction “ADDI $1, zero, 0” that can able to put the value of “0” in the “$1”.

So, if bit 7 of the instruction is stuck at one then, the immediate operand will become “128” and “$1” turns into 128, but the 0 will not turn into.

4.6.3

This is quite complex to work around with this kind of fault.

First of all, it is needed to find all of the instructions that have the value of “0” in the offset or immediate bit operand and that is to get the replacement of the instruction sequence “safe”.

4.6.4

If the “MemRead” is stuck at zero, then the data memory is read for each instruction. And for the non-load instructions, the Mux discards the memory- value that can select the value to be written in the unit of register.

As the outcome, the desired design can’t be possible for this kind of test due to this specified fault. The reason for this is that still the processor operates properly.

4.6.5

If the “jump” is stuck-at-one, the PC is updated by each instruction as if this were in the “jump” instruction.

To do the test for this kind of fault, an ADDI can be executed with an immediate operand of non-zero.

If the “jump” is stuck-at-one, after the execution of “ADDI” the PC will not point to the following instructions of the “ADDI”.