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Chapter 6: Appendix B, 44. (page 500)

Implement the logic equations of Exercise B.43 as a PLA

Short Answer

Expert verified

The diagram of PLA is given below:

Step by step solution

01

Definition of PLA

PLA is short for Programmable Logic Array. It is a logic device with programmable AND gates followed by programmable OR gates. Logic equations are used to draw PLAs. The input buffers in PLA are equal to the number of inputs. The number of programmable AND gates is equal to the number of minterms. The logic equations for traffic control system are:

02

Design a PLA

The following diagram shows the PLA for traffic control system:

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Most popular questions from this chapter

Question: 6.18 When performing computations on sparse matrices, latency in the memory hierarchy becomes much more of a factor. Sparse matrices lack the spatial locality in the data stream typically found in matrix operations. As a result, new matrix representations have been proposed. One the earliest sparse matrix representations is the Yale Sparse Matrix Format. It stores an initial sparse m × n matrix, M in row form using three one-dimensional arrays. Let R be the number of nonzero entries in M. We construct an array A of length R that contains all nonzero entries of M (in left -to-right top-to-bottom order). We also construct a second array IA of length m + 1 (i.e., one entry per row, plus one). IA(i) contains the index in A of the first nonzero element of row i. Row i of the original matrix extends from A(IA(i)) to A(IA(i+1)−1). The third array, JA, contains the column index of each element of A, so it also is of length R.

6.18.1 [15] consider the sparse matrix X below and write C code that would store this code in Yale Sparse Matrix Format.

Row 1 [1, 2, 0, 0, 0, 0]

Row 2 [0, 0, 1, 1, 0, 0]

Row 3 [0, 0, 0, 0, 9, 0]

Row 4 [2, 0, 0, 0, 0, 2]

Row 5 [0, 0, 3, 3, 0, 7]

Row 6 [1, 3, 0, 0, 0, 1]

6.18.2 [10] In terms of storage space, assuming that each element in matrix X is single precision floating point, compute the amount of storage used to store the Matrix above in Yale Sparse Matrix Format.

6.18.3 [15] Perform matrix multiplication of Matrix X by Matrix Y shown below. [2, 4, 1, 99, 7, 2] Put this computation in a loop, and time its execution. Make sure to increase the number of times this loop is executed to get good resolution in your timing measurement. Compare the runtime of using a naïve representation of the matrix, and the Yale Sparse Matrix Format.

6.18.4 [15] Can you find a more efficient sparse matrix representation (in terms of space and computational overhead)?

Virtualization software is being aggressively deployed to reduce the costs of managing today’s high performance servers. Companies like VMWare, Microsoft and IBM have all developed a range of virtualization products. The general concept, described in Chapter 5, is that a hypervisor layer can be introduced between the hardware and the operating syste, to allow multiple operating systems to share the same physical hardware. The hypervisor is then responsible for allocating CPU and memory resources, as well as handling services typically handled by the operating system (e.g., I/O)

Virtualization provides an abstract view of the underlying hardware to the hosted operating system and application software. This will require us to rethink how multi-core and multiprocessor systems will be designed in the future to support the sharing of CPUs and memories by a number of operating systems concurrently.

6.10.1 [30] Select two hypervisors on the market today, and compare and contrast how they virtualize and manage the underlying hardware (CPUs and memory)

6.10.2 [15] Discuss what changes may be necessary in future multi-core CPU platforms in order to better match the resource demands placed on these systems. For instance, can multithreading play an effective role in alleviating the competition for computing resources?

A.8 [5] Using SPIM, write and test a program that reads in a positive integer using the SPIM system calls. If the integer is not positive, the program should terminate with the message “Invalid Entry”; otherwise the program should print out the names of the digits of the integers, delimited by exactly one space. For example, if the user entered “728,” the output would be “Seven Two Eight.”

B.26 [5] <§B.6> Rewrite the equations on page B-44 for a carry-lookahead logic for a 16-bit adder using a new notation. First, use the names for the CarryIn signals of the individual bits of the adder. That is, use c4, c8, c12, … instead of C1, C2, C7, …. In addition, let Pi,j; mean a propagate signal for bits i to j, and Gi,j; mean a generate signal for bits i to j. For example, the equation

C2 = G1+( P1.G0)+( P1.P0. c0) can be rewritten as

c8= G 7,4 + (P7,4 .G7,0) +( P7,4 .P3,0.c0)

This more general notation is useful in creating wider adders.

Assign state numbers to the states in the traffic light example of Exercise B.41 and use the tables of Exercise B.42 to write a set of logic equations for each of the outputs. Including the next-state outputs.

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