Chapter 5: Q19E (page 497)
In this exercise we show the definition of a web server log and examine code optimizations to improve log processing speed. The data structure for the log is defined as follows:
struct entry {
int srcIP; // remote IP address
char URL[128]; // request URL (e.g., “GET index.html”)
long long refTime; // reference time
int status; // connection status
char browser[64]; // client browser name
} log [NUM_ENTRIES];
Assume the following processing function for the log:
topK_sourceIP (int hour);
5.19.1 Which fields in a log entry will be accessed for the given log processing function? Assuming 64-byte cache blocks and no prefetching, how many caches misses per entry does the given function incur on average?
5.19.2 How can you reorganize the data structure to improve cache utilization and access locality? Show your structure definition code.
5.19.3 Give an example of another log processing function that would prefer a different data structure layout. If both functions are important, how would you rewrite the program to improve the overall performance? Supplement the discussion with code snippets and data.
For the problems below, use data from “Cache performance for SPEC CPU2000 Benchmarks”(http://www.cs.wisc.edu/multifacet/misc/spec2000cache-data/) for the pairs of benchmarks shown in the following table.
a. | Mesa/gcc |
b. | mcf/swim |
5.19.4 For 64KiB data caches with varying set associativities, what are the miss rates broken down by miss types (cold, capacity, and conflict misses) for each benchmark?
5.19.5 Select the set associativity to be used by a 64KiB L1 data cache shared by both benchmarks. If the L1 cache has to be directly mapped, select the set associativity for the 1 MiB cache.
5.19.6 Give an example in the miss rate table where higher set associativity increases the miss rate. Construct a cache configuration and reference stream to demonstrate this.
Short Answer
5.19.1 srcIP and refTime fields. 2 misses per entry.
5.19.2 Group the srcIP and refTime fields into a separate array.
5.19.3 peak_hour (int status);
5.19.4 Conflict and compulsory misses are not affected by associativity. And the selection varies with the data set used.
5.19.5 The set associativity will vary with the data set used.
5.19.6 The“Cache performance for SPEC CPU2000”has many examples like apsi/mesa/ammp/mcf.
Cache:4-block caches, direct-mapped vs 2-way LRU.
Reference stream: 1 2 2 6 1