Question

Question: Write the MIPS assembly code to implement the following C code:

lock(lk);

shvar=max(shvar.x);

unlock(lk);

Assume that the address of the lk variable is in \(a0, the address of the shvar variable is in \)a1, and the value of variable x is in $a2. Your critical section should not contain any function calls. Use ll/sc instructions to implement the lock() operation and the unlock() operation is simply an ordinary store instruction.

Short answer

The MIPS assembly code to implement the given C code:

trylk: li $t1,1

ll $t0,0($a0)

bnez $t0,trylk

sc $t1, 0($a0)

beqz $t1, trylk

lw $t2, 0($a1)

slt $t3,$t2,$a2

bnez $t3, skip

sw $a2, 0(a1)

skip:sw $0, 0($a0)

Step-by-step solution

Step 1:Determine theMIPS branch instructions and parallelism

Parallelism can be achieved by MIPS assembly language through a pair of special instructions. The instructions load linked and store conditional are used in sequence. If the contents of the memory location specified by the load linked are changed before the store conditional to the same address occurs, the store conditional fails.If the store conditional succeeds, it changes the value of the register to 1. Then the load linked will return the initial value. This sequence implements the atomic change on the memory location.

Determine the MIPS assembly code to implement the given C code.

Given C code:

lock(lk);

shvar=max(shvar.x);

unlock(lk);

It is given that the address of the lk variable is in $a0, and the address of shvar is in $a1.The value of x variable is in $a2. The critical section should not contain any function calls.ll/sc instructions must be used to implement the lock() operation, and the unlock() operation must be simply an ordinary store instruction.

MIPS code for the given C:

trylk: li $t1,1 #immediate 1 is loaded to $t1

ll $t0,0($a0) #load linked will load the value to the memory and

#monitors the address to check if any other #process writes to it

bnez $t0,trylk #branch if not equal to zero to trylk function

sc $t1, 0($a0) #Store conditional will store the values if there is #no write in the monitored memory and if no #exceptions occurred.

beqz $t1, trylk #Branch if equal to zero to trylkfunction

lw $t2, 0($a1) #load word to $t2

slt $t3,$t2,$a2 # set if less then instruction will set 1 to the #destination register of the t2 is less than a2.

bnez $t3, skip # branch to skip is not equal to zero.

sw $a2, 0(a1) #Store word at $a2.

skip:sw $0, 0($a0) #store word.