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Question: Assume \(t0 holds the value 0x00101000. What is the value of \)t2 after the following instructions?

slt \(t2, \)0, \(t0

bne \)t2, \(0, ELSE

j DONE

ELSE: addi \)t2,$t2, 2

DONE:

Short Answer

Expert verified

The value of $t2 after the execution of the given instructions is :

$t2=3

Step by step solution

01

Define MIPS decision making instructions

The instructions beq and bne are used to make decisions.

For example: beq register1,register2,L1

The instruction beq stands for “branch if equal”, which will go to the statement of the label specified if the register1 value is equal to register 2.

For example: bne register1,register2,L1

The instruction bne stands for “branch if not equal”, which will go to the labelled statement if register 1 value is not equal to register 2 value.

02

Determine the value of $t2.

Given MIPS instructions:

slt $t2, $0, $t0

bne $t2, $0, ELSE

j DONE

ELSE: addi $t2,$t2, 2

DONE:

In the above instruction, slt stands for “set on less than” . This instruction will compare the value $0 with the value of $t0. If the value $0 is less than The value of $t0, then the $t2 is set to 1.Here it is given that $t0 register has the value 0x00101000.

Now, if then the value of $t2 is set to 1. Since 0 is less than the value of $t0 , now the value of $t2 is set to 1.

Instruction bne stands for “branch if not equal” . The values of $t2 and $0 is compared to check whether they are equal. Here, the value of $t2 is 1 and it is compared to 0, so they are not equal. So the ELSE part will be executed.

The ELSE part has the addi instruction that will add the value 2 to the value of $t2 and store the result in $t2.

We know that $t2=1, will be added to 2 and then the result 3 will be stored in $t2.

Now, $t2=3 after the execution of the given instructions.

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Most popular questions from this chapter

Question: Using your code from Exercise 2.43 as an example, explain what happens when two processors begin to execute this critical section at the same time, assuming that each processor executed exactly one instruction per cycle.

If the current value of the PC is 0x1FFFf000, can you use a single jump instruction to get to the PC address as shown in Exercise 2.39?

Assume that for a given program 70% of the executed instructions are arithmetic, 10% are load/store, and 20% are branch.

2.47.1 [5] <§2.19> Given this instruction mix and the assumption that an

arithmetic instruction requires 2 cycles, a load/store instruction takes 6 cycles, and a branch instruction takes 3 cycles, find the average CPI.

2.47.2 [5] <§2.19> For a 25% improvement in performance, how many cycles, on average, may an arithmetic instruction take if load/store and branch instructions are not improved at all?

2.47.3 [5] <§2.19> For a 50% improvement in performance, how many cycles, on average, may an arithmetic instruction take if load/store and branch instructions are not improved at all?

[5] Assume for a given processor the CPI of arithmetic instructions is 1, the CPI of load/store instructions is 10, and the CPI of branch instructions is 3.

Assume a program has the following instruction breakdowns: 500 million arithmetic instructions, 300 million load/store instructions, 100 million branch instructions.

2.46.1 [5] <§2.19> Suppose that new, more powerful arithmetic instructions are added to the instruction set. On average, through the use of these more powerful arithmetic instructions, we can reduce the number of arithmetic instructions needed to execute a program by 25%, and the cost of increasing the clock cycle time by only 10%. Is this a good design choice? Why?

2.46.2 [5] <§2.19> Suppose that we find a way to double the performance of arithmetic instructions. What is the overall speedup of our machine? What if we find a way to improve the performance of arithmetic instructions by 10 times?

Question: Provide the type and hexadecimal representation of the following instruction:

sw \(t1, 32(\)t2)

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