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Question: For the following C statement, write a minimal sequence of MIPS assembly instructions that does the identical operation. Assume \(t1=A, \)t2=B and $s1 is the base address of C.


Short Answer

Expert verified

The sequence of MIPS assembly instructions for the is as follows:

lw $t3,0($s1)

sll $t1,$t3,4

Step by step solution

01

Define MIPS logical instructions and Arrays.

The sll and srl are the shift instructions that make the left and a right shift in the bits of the registers. The array can be declared in MIPS through lw and sll instructions. Each Array has the size and the index for each element stored. Array indexing starts from 0 and the elements can be accessed through the index.

02

Determine the MIPS instruction

Given that, $t1=A and $t2=B. The base address of C is $s1.

To assign the base address of C to $s1, then the lw instruction will be used to load. This will load the element at a 0-byte offset from $s1.

Then for shifting sll instruction is used.

The sequence of MIPS assembly instructions for the

is as follows:

lw $t3,0($s1)

sll $t1,$t3,4

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Most popular questions from this chapter

[5] <§2.7> Suppose the program counter (PC) is set to 0x2000 0000. Is it possible to use the jump (j) MIPS assembly instruction to set the PC to the address as 0x4000 0000? Is it possible to use the branch-on-equal (beq) MIPS assembly instruction to set the PC to this same address?

Assume \(t0 holds the value 0x00101000. What is the value of \)t2 after the following instructions?

slt \(t2, \)0, \(t0

bne \)t2, \(0, ELSE

j DONE

ELSE: addi \)t2,$t2, 2

DONE:

[5] Assume for a given processor the CPI of arithmetic instructions is 1, the CPI of load/store instructions is 10, and the CPI of branch instructions is 3.

Assume a program has the following instruction breakdowns: 500 million arithmetic instructions, 300 million load/store instructions, 100 million branch instructions.

2.46.1 [5] <§2.19> Suppose that new, more powerful arithmetic instructions are added to the instruction set. On average, through the use of these more powerful arithmetic instructions, we can reduce the number of arithmetic instructions needed to execute a program by 25%, and the cost of increasing the clock cycle time by only 10%. Is this a good design choice? Why?

2.46.2 [5] <§2.19> Suppose that we find a way to double the performance of arithmetic instructions. What is the overall speedup of our machine? What if we find a way to improve the performance of arithmetic instructions by 10 times?

Question: The following instruction is not included in the MIPS instruction set:

rpt $t2, loop # if(R[rs]>0) R[rs]=R[rs]−1, PC=PC+4+BranchAddr

2.25.1 [5] <§2.7> If this instruction were to be implemented in the MIPS

instruction set, what is the most appropriate instruction format?

2.25.2 [5] <§2.7> What is the shortest sequence of MIPS instructions that

performs the same operation?

Question: Can we use the tail-call optimization in this function? If no, explain why not. If yes, what is the difference in the number of executed instructions in f with and without the optimization?

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