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Question: Provide a minimal set of MIPS instructions that may be used to implement the following pseudo instruction:

not \(t1,\)t2 // bit-wise invert

Short Answer

Expert verified

The MIPS instructions that are used to implement the given pseudo instruction is as follows:

nor $t1,$t2,$t2

Step by step solution

01

Define MIPS logical instructions.

MIPS logical instructions are sll, srl, and, andi, or, ori, and nor. The sll and srl are the shift instructions that make the left and a right shift in the bits of the registers. The and, or instructions perform logical AND, OR operations between the data in the registers. To perform logical operations on immediate values andi, ori instructions are used. Instead of NOT, nor is used in MIPS assembly language.

02

Determine the MIPS instruction

In MIPS, instead of NOT, nor is used to perform the NOT operation. Instruction nor will provide the inverted bit of the operand involved.

Pseudo instruction:

not $t1,$t2

For example, let us consider the value of $t2 to be 10100, then the NOT operation will be performed. After the NOT operation, the bits of $t2 will be inverted bit by bit and the value of $t1 will be 01011.

MIPS instruction:

nor $t1,$t2,$t2

The above instruction will perform the NOT OR, which results in NOT operation.

For example, let us consider the value of $t2 to be 10101, then the value of $t2 will perform OR operation with 0. Then the value of $t2 will 10101. Now the NOT will be performed on the value of $t2 and the result 01010 will be stored in the $t1 register.

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Most popular questions from this chapter

Question: Translate the following loop into C. Assume that the C-level integer i is held in register \(t1, \)s2 holds the C-level integer called result, and \(s0 holds the base address of the integer MemArray.

addi \)t1, \(0, \)0

LOOP: lw \(s1, 0(\)s0)

add \(s2, \)s2, \(s1

addi \)s0, \(s0, 4

addi \)t1, \(t1, 1

slti \)t2, \(t1, 100

bne \)t2, $s0, LOOP

For the following C statement, what is the corresponding MIPS assembly code? Assume that the variables f, g, h, i, and j are assigned to registers \(s0, \)s1, \(s2, \)s3, and \(s4, respectively. Assume that the base address of the arrays A and B are in registers \)s6 and $s7, respectively.

B8=Ai-j;

Translate 0×abcdef12into decimal

Write a program in MIPS assembly language to convert an ASCII number string containing positive and negative integer decimal strings, to an integer. Your program should expect register \(a0 to hold the address of a null-terminated string containing some combination of the digits 0 through 9. Your program should compute the integer value equivalent to this string of digits, then place the number in register \)v0. If a non-digit character appears anywhere in the string, your program should stop with the value -1 in register \(v0. For example, if register \)a0 points to a sequence of three bytes 50ten, 52ten, 0ten (the null-terminating string “24”), then when the program stops, register $v0 should contain the value 24ten.

Question: For the following MIPS assembly instructions above, what is a corresponding C statement?

add f, g, h

add f, i, f

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