Question

Question:2.18 Assume that we would like to expand the MIPS register file to 128 registers and expand the instruction set to contain four times as many instructions.

2.18.1 [5] How this would this affect the size of each of the bit fields in the R-type instructions?

2.18.2 [5] How this would this affect the size of each of the bit fields in the I-type instructions?

2.18.3 [5] How could each of the two proposed changes decrease the size of an MIPS assembly program? On the other hand, how could the proposed change increase the size of an MIPS assembly program?

Short answer

2.18.1

The size of the fields “rs (source register)”,”rt (the second register operand)”, and the “rd (the destination register)” of the “R-Type” instruction is increased by the 7 bits.

2.18.2

The size of the fields “rs(source register)”,”rt(the second register operand)”, and the “rd(the destination register)” of the “I-Type” instruction is increased by the 7 bits.

2.18.3

The memory size which is occupied by the instruction word(the destination register) will be raised during the time period according to the necessity of adding the additional bits into the opcode. And the size of the program will be extended by the fields of the register.

Step-by-step solution

Define the concept.

2.18.1

For the “R-Type” instruction,

Component of the instruction	Occupied bits
Opcode	6
“rs”(source register)	5
“rt”(the second register operand)	5
“rd”(the destination register)	5

2.18.2

For the “I-Type” instruction,

Component of the instruction	Occupied bits
Opcode	6
“rs”(source register)	5
“rt”(the second register operand)	5
“rd”(the destination register)	5

2.18.3

The size of the programs can be reduced due to the below mentioned case.

If the complex operation will be operated in any single instruction has the amount of the leaking problem of the reducing register less than the complex operation will be operated in many instruction.

Determine the calculation.

2.18.1

For the “R-Type” instruction,

If the field size of the opcode will be extended by “2 bits” then the field size of the opcode will be 8 bits.

If the field size of the “rs (source register)” will be extended by “2 bits” then the field size of the opcode will be 7 bits.

If the field size of the “rt (the second register operand)” will be extended by “2 bits” then the field size of the opcode will be 7 bits.

If the field size of the “rd (the destination register)” will be extended by “2 bits” then the field size of the opcode will be 7 bits.

2.18.2

For the “I-Type” instruction,

If the field size of the opcode will be extended by “2 bits” then the field size of the opcode will be 8 bits.

If the field size of the “rs (source register)” will be extended by “2 bits” then the field size of the opcode will be 7 bits.

If the field size of the “rt (the second register operand)” will be extended by “2 bits” then the field size of the opcode will be 7 bits.

If the field size of the “rd (the destination register)” will be extended by “2 bits” then the field size of the opcode will be 7 bits.

2.18.3

The size of the programs can be reduced due to the below-mentioned case.

If the complex operation will be operated in any single instruction has the amount of the leaking problem of the reducing register less than the complex operation will be operated in many instruction.

The memory size which is occupied by the instruction word will be raised during the time period according to the necessity of adding the additional bits into the opcode. And the size of the program will be extended by the fields of the register.