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Question: Provide the type and hexadecimal representation of the following instruction:

sw \(t1, 32(\)t2)

Short Answer

Expert verified

The instruction is i-type and the hexadecimal representation is 0xAD490032

Step by step solution

01

Determine the MIPS instruction types

The MIPS instructions are of two types R-type and I-type.

R-type instructions refer to the instructions that use the register values for performing operations.

I-Type instructions refer to the instructions that use the immediate values rather than the register values.

02

Determine a type and the hexadecimal representation of the instruction

The given instruction is I-type. The instructions sw and lw are of I type because of the offset value provided.

The instruction fields of the given instruction are as follows:

sw $t1,32($t2)





Opcode-6bits

rsource-5bits

rdestination-5bits

address-16bits

43

10

9

32

Convert all the above values to binary values:

1010 1101 0100 1001 0000 0000 0011 0010

Now convert the binary to hexadecimal:

0xAD490032

Therefore, the hexadecimal representation of the given instruction is 0xAD490032

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Most popular questions from this chapter

[5] Consider the following MIPS loop:

LOOP: slt \(t2, \)0, \(t1

beq \)t2, \(0, DONE

subi \)t1, \(t1, 1

addi \)s2, \(s2, 2

j LOOP

DONE:

2.26.1 [5] <§2.7> Assume that the register \)t1 is initialized to the value 10. What is the value in register \(s2 assuming \)s2 is initially zero?

2.26.2 [5] <§2.7> For each of the loops above, write the equivalent C code routine. Assume that the registers \(s1, \)s2, \(t1, and \)t2 are integers A, B, i, and temp, respectively.

2.26.3 [5] <§2.7> For the loops written in MIPS assembly above, assume that the register $t1 is initialized to the value N. How many MIPS instructions are executed?

For each MIPS instruction, show the value of the opcode(OP), source register(RS), and target register(RT) fields. For the I-type instructions, show the value of the immediate field, and for the R-type instructions, show the value of the destination register(RD) field.

addi \(t0,\)s6,4

add \(t1.\)s6,\(0

sw \)t1, 0(\(t0)

lw \)t0,0(\(t0)

add \)s0,\(t1,\)t0

Question 2.4 [5] For the MIPS assembly instructions below, what is the corresponding C statement? Assume that the variables f, g, h, i, and j are assigned to registers \(s0, \)s1, \(s2, \)s3, and \(s4, respectively. Assume that the base address of the arrays A and B are in registers \)s6 and \(s7, respectively.

sll \)t0, \(s0, 2 # \)t0 = f * 4

add \(t0, \)s6, \(t0 # \)t0 = &A[f]

sll \(t1, \)s1, 2 # \(t1 = g * 4

add \)t1, \(s7, \)t1 # \(t1 = &B[g]

lw \)s0, 0(\(t0) # f = A[f]

addi \)t2, \(t0, 4

lw \)t0, 0(\(t2)

add \)t0, \(t0, \)s0

sw \(t0, 0(\)t1)

For the following C statement, write a minimal sequence of MIPS assembly instructions that does the identical operation. Assume \(t1=A, \)t2=B and $s1 is the base address of C.

A=C04;

The following instruction is not included in the MIPS instruction set:

rpt $t2, loop # if(R[rs]>0) R[rs]=R[rs]−1, PC=PC+4+BranchAddr

2.25.1 [5] <§2.7> If this instruction were to be implemented in the MIPS

instruction set, what is the most appropriate instruction format?

2.25.2 [5] <§2.7> What is the shortest sequence of MIPS instructions that

performs the same operation?

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