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Translate the following loop into C. Assume that the C-level integer i is held in register \(t1, \)s2 holds the C-level integer called result, and \(s0 holds the base address of the integer MemArray.

addi \)t1, \(0, \)0

LOOP: lw \(s1, 0(\)s0)

add \(s2, \)s2, \(s1

addi \)s0, \(s0, 4

addi \)t1, \(t1, 1

slti \)t2, \(t1, 100

bne \)t2, $s0, LOOP

Short Answer

Expert verified

The C code:

for(i=0;i<100;i++){result=MemArray[i];}

Step by step solution

01

Definition of loop

Loop is a programming structure used when some statements will be repeatedly executed until the condition is satisfied.

02

As per the question, these are the following highlights

This Program adds the element in the integer array $s0 of 100 elements.

The base address of the integer MemArray is held by $s0.

Then the integer array in C program will be MemArray

Hence, the C Code is;

for(i=0;i<100;i++){result=MemArray[i];}

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Most popular questions from this chapter

For the following MIPS assembly instructions above, what is a corresponding C statement?

add f, g, h

add f, i, f

Question: Assume \(t0 holds the value 0x00101000. What is the value of \)t2 after the following instructions?

slt \(t2, \)0, \(t0

bne \)t2, \(0, ELSE

j DONE

ELSE: addi \)t2,$t2, 2

DONE:

[5] <§2.7> Translate the following C code to MIPS assembly code. Use a minimum number of instructions. Assume that the values of a, b, i, and j are in registers \(s0, \)s1, \(t0, and \)t1, respectively. Also, assume that register $s2 holds the base address of the array D.

for(i=0; i<a; i++)

for(j=0; j<b; j++)

D[4*j] = i + j;

Question: Assume that for a given program 70% of the executed instructions are arithmetic, 10% are load/store, and 20% are branch.

2.47.1 [5] <§2.19> Given this instruction mix and the assumption that an

arithmetic instruction requires 2 cycles, a load/store instruction takes 6 cycles, and a branch instruction takes 3 cycles, find the average CPI.

2.47.2 [5] <§2.19> For a 25% improvement in performance, how many cycles, on average, may an arithmetic instruction take if load/store and branch instructions are not improved at all?

2.47.3 [5] <§2.19> For a 50% improvement in performance, how many cycles, on average, may an arithmetic instruction take if load/store and branch instructions are not improved at all?

Find the shortest sequence of MIPS instructions that extracts bits 16 down to 11 from register \(t0 and uses the value of this field to replace bits 31 down to 26 in register \)t1 without changing the other 26 bits of register $t1.

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