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Chapter 1: Q43E (page 2)

Assign state numbers to the states in the traffic light example of Exercise B.41 and use the tables of Exercise B.42 to write a set of logic equations for each of the outputs. Including the next-state outputs.

Short Answer

Expert verified

The set logic equations are:

Step by step solution

01

Design the state diagram for the traffic control system

The state diagram consists of the states and transitions from one state to the other state. According to the timer t, the traffic signal transits from one state to the other. If the signal is not passed, then the system stays on the same state. The following is the diagram for traffic control system:

02

Design a truth table for the states of the traffic control system

The inputs are I1, I2, and I3. The outputs are O1 and O2. The input I1 represents the timer. The output I1 is equal to the AND operation between the inputs I1 and I2. The output O2 is equal to the AND operation between I2 and I3.

I1

I2

I3

O1

O2

0

0

0

0

0

0

0

1

1

1

0

1

0

0

0

0

1

1

1

1

1

0

0

0

1

1

0

1

0

1

1

1

0

1

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1

1

1

0

03

Design the logic equations from the truth table

The logic equations can be designed from the input and outputs. The logic equation for O1 is:

The logic equation for O2 is:

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Most popular questions from this chapter


Question: A friend would like you to build an “electronic eye” for use as a fake security device. The device consists of three lights lined up in a row, controlled by the outputs Left, Middle, and Right, which, if asserted, indicate that a light should be on. Only one light is on at a time, and the light “moves” from left to right and then from right to left, thus scaring away thieves who believe that the device is monitoring their activity. Draw the graphical representation for the finite-state machine used to specify the electronic eye. Note that the rate of the eye’s movement will be controlled by the clock speed (which should not be too great) and that there are essentially no inputs.

Question: The eight great ideas in computer architecture are similar to ideas from other fields. Match the eight ideas from computer architecture, “Design for Moore’s Law”, “Use Abstraction to Simplify Design”, “Make the Common Case Fast”, “Performance via Parallelism”, “Performance via Pipelining”, “Performance via Prediction”, “Hierarchy of Memories”, and “Dependability via Redundancy” to the following ideas from other fields:

a. Assembly lines in automobile manufacturing

b. Suspension bridge cables

c. Aircraft and marine navigation systems that incorporate wind information

d. Express elevators in buildings

e. Library reserve desk

f. Increasing the gate area on a CMOS transistor to decrease its switching time

g. Adding electromagnetic aircraft catapults (which are electrically-powered as opposed to current steam-powered models), allowed by the increased power generation offerred by the new reactor technology

h. Building self-driving cars whose control systems partially rely on existing sensor systems already installed into the base vehicle, such as lane departure systems and smart cruise control systems

Assume that X consists of 3 bits, x2 x1 x0, and Y consists of 3 bits, y2 y1 y0. Write logic functions that are true if and only if

■X<Y, where X and Y are thought of as unsigned binary numbers

■X<Y, where X and Y are thought of as signed (two’s complement) numbers

■X=Y

Use a hierarchical approach that can be extended to larger numbers of bits. Show how can you extend it to 6-bit comparison.

QuestionB.28 [10] <§B.6> Now calculate the relative performance of adders. Assume that hardware corresponding to any equation containing only OR or AND terms, such as the equations for pi and gi on page B-40, takes one time unit T. Equations that consist of the OR of several AND terms, such as the equations for c1, c2, c3, and c4 on page B-40, would thus take two time units, 2T. The reason is it would take T to produce the AND terms and then an additional T to produce the result of the OR. Calculate the numbers and performance ratio for 4-bit adders for both ripple carry and carry lookahead. If the terms in equations are further defined by other equations, then add the appropriate delays for those intermediate equations, and continue recursively until the actual input bits of the adder are used in an equation. Include a drawing of each adder labeled with the calculated delays and the path of the worst-case delay highlighted.

Question: Assign state numbers to the states of the finite-state machine you constructed for Exercise B.37 and write a set of logic equations for each of the outputs, including the next-state bits.
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