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Chapter 1: Q38E (page 2)

Question: Assign state numbers to the states of the finite-state machine you constructed for Exercise B.37 and write a set of logic equations for each of the outputs, including the next-state bits.

Short Answer

Expert verified

Answer

The logic equations are:

L = In1’ . In0’

M = In1’ . In0

R = In1 . In0’

Next-state input_In1 = In1’ . In0

Next-state input_In0 = In1’ . In0’

Step by step solution

01

Truth table for the finite-state machine

Suppose the input signal is In1 and In0. The output signals for three light bulbs are L, M, and R. The truth table for the state machine is

Current State

Next State

Outputs

Next State Inputs

In1

In0

In1

In0

L

M

R

In1

In0

0

0

0

1

1

0

0

0

1

0

1

1

0

0

1

0

1

0

1

0

0

0

0

0

1

0

0

1

1

Don’t Care

Don’t Care

0

0

0

0

0

02

Logic equation for outputs and next-states 

The left bulb L is on when the value of both In1 and In0 are 0. The middle bulb M is on when In1 is 0 and In2 is 1. The right bulb R is on when In1 is 1 and In0 is 0. The logic equations of outputs are:

L = In1’ . In0’

M = In1’ . In0

R = In1 . In0’

The logic equations for next-states input are:

Next-state input_In1 = In1’ . In0

Next-state input_In0 = In1’ . In0’

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Most popular questions from this chapter

Prove that a two-input multiplexor is also universal by showing how to build the NAND (or NOR) gate using a multiplexor

A.10 [10] <§§A.6, A.9> Using SPIM, write and test a recursive program for solving the classic mathematical recreation, the Towers of Hanoi puzzle. (This will require the use of stack frames to support recursion.) The puzzle consists of three pegs (1, 2, and 3) and n disks (the number n can vary; typical values might be in the range from 1 to 8). Disk 1 is smaller than disk 2, which is in turn smaller than disk 3, and so forth, with disk n being the largest. Initially, all the disks are on peg 1,

Starting with disk n on the bottom, disk n − 1 on top of that, and so forth, up to disk 1 on the top. The goal is to move all the disks to peg 2. You may only move one disk at a time, that is, the top disk from any of the three pegs onto the top of either of the other two pegs. Moreover, there is a constraint: You must not place a larger disk on top of a smaller disk.

The C program below can be used to help write your assembly language program.

/* move n smallest disks from start to finish using

extra */

void hanoi(int n, int start, int finish, int extra){

if(n != 0){

hanoi(n-1, start, extra, finish);

print_string(“Move disk”);

print_int(n);

print_string(“from peg”);

print_int(start);

print_string(“to peg”);

print_int(finish);

print_string(“.\n”);

hanoi(n-1, extra, finish, start);

}

}

main(){

int n;

print_string(“Enter number of disks>“);

n = read_int();

hanoi(n, 1, 2, 3);

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The results of the SPEC CPU2006 bzip2 benchmark running on an AMD Barcelona has an instruction count of 2.389E12, an execution time of 750 s, and a reference time of 9650 s.

1.11.1 [5] <§§1.6, 1.9> Find the CPI if the clock cycle time is 0.333 ns.

1.11.2 [5] <§1.9> Find the SPECratio.

1.11.3 [5] <§§1.6, 1.9> Find the increase in CPU time if the number of instructions of the benchmark is increased by 10% without affecting the CPI.

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1.11.5 [5] <§§1.6, 1.9> Find the change in the SPECratio for this change.

1.11.6 [10] <§1.6> Suppose that we are developing a new version of the AMD Barcelona processor with a 4 GHz clock rate. We have added some additional instructions to the instruction set in such a way that the number of instructions has been reduced by 15%. Th e execution time is reduced to 700 s and the new SPECratio is 13.7. Find the new CPI.

1.11.7 [10] <§1.6> Th is CPI value is larger than obtained in 1.11.1 as the clock rate was increased from 3 GHz to 4 GHz. Determine whether the increase in the CPI is similar to that of the clock rate. If they are dissimilar, why?

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58 Chapter 1 Computer Abstractions and Technology

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1.11.10 [10] <§1.6> Determine the clock rate required to give a further 10% reduction in CPU time while maintaining the number of instructions and with the CPI unchanged.

1.11.11 [10] <§1.6> Determine the clock rate if the CPI is reduced by 15% and the CPU time by 20% while the number of instructions is unchanged.

B.24 [15] <§B.5> The ALU supported set on less than (slt) using just the sign bit of the adder. Let’s try a set on less than operation using the values -7ten and 6ten. To make it simpler to follow the example, let’s limit the binary representations to 4 bits: 1001two and 0110two. 1001two – 0110two = 1001two + 1010two = 0011two This result would suggest that -7 > 6, which is clearly wrong. Hence, we must factor in overflow in the decision. Modify the 1-bit ALU in Figure B.5.10 on page B-33 to handle slt correctly. Make your changes on a photocopy of this figure to save time.

What is the function implemented by the following Verilog modules:

Module FUNC1 (I0, I1, S, out):

input I0, I1;

input S;

output out;

out = S? I1: I0;

endmodule

module FUNC2 (out, ctl, clk,reset);

output [7:0] out;

input ctl, clk, reset;

reg [7:0] out;

always @(posedge clk)

if (reset) begin

out <= 8’b0;

end

else if (ctl) begin

out <= out+1;

end

else begin

out <= out-1;

end

endmodule
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