Question

B.27 [15] <§B.6> Write the equations for the carry-lookahead logic for a 64- bit adder using the new notation from Exercise B.26 and using 16-bit adders as building blocks. Include a drawing similar to Figure B.6.3 in your solution.

Short answer

The required new equation:

$\begin{array}{l}\text{C1=G0+}\left(\text{P0×c0}\right)\\ \text{C2=G1+}\left(\text{P1×G0}\right)\text{+}\left(\text{P1×P0×c0}\right)\\ \text{C3=G2+}\left(\text{P2×G1}\right)\text{+}\left(\text{P2×P1×G0}\right)\text{+}(\text{P2}\times \text{P1}\times \text{P0}\times \text{c0})\end{array}$

Step-by-step solution

Define the concept.

The 64- bit adderhas the feature of carry propagating and carry generating.

For the carry propagating, the carry propagator (P) is used for propagating to the following state of this.

For carry generating, the carry generator (G) is used for generating the result query by not considering the carry of the input.

The computed sum of every 16-bit adder is represented by “S”.

Determine the calculation.

The new equation for the carry-look ahead logic (64- bit adder) that is implemented by the 16-bit adders, those are acted as the building block:

$\begin{array}{l}\text{C1=G0+}\left(\text{P0×c0}\right)\\ \text{C2=G1+}\left(\text{P1×G0}\right)\text{+}\left(\text{P1×P0×c0}\right)\\ \text{C3=G2+}\left(\text{P2×G1}\right)\text{+}\left(\text{P2×P1×G0}\right)\text{+}(\text{P2}\times \text{P1}\times \text{P0}\times \text{c0})\end{array}$

The diagram of (64- bit adder) that is implemented by the 16-bit adders, those are acted as the building block: