Question

A simple check for overflow during addition is to see if the CarryIn to the most significant bit is not the same as the CarryOut of the most significant bit. Prove that this check is the same as in Figure 3.2.

Short answer

If there is an overflow, the sign bit is represented by the result of the addition operation. So, if the CarryIn and Carryout of the most significant bit is not equal, then overflow occurs. It happens when addition of two positive numbers results in negative value and addition of two negative numbers results in positive value.

Step-by-step solution

Identify the conditions for overflow from Figure 3.2 

Overflow occurs when the result of the arithmetic operation cannot be specified using the available bits. During addition, overflow occurs when the result of the two positive numbers is negative or the result of addition of two negative numbers is positive.

Draw the truth table for overflow

The following truth table shows the overflow values for different scenarios of addition of two numbers A and B:

Sign of A	Sign of B	CarryIn	CarryOut	Sign of result	Overflow
0	0	0	0	0	0
0	0	1	0	1	1
0	1	0	0	1	0
0	1	1	1	0	0
1	0	0	0	1	0
1	0	1	1	0	0
1	1	1	1	1	1
1	1	1	1	1	0

Identify when overflow occurs from the truth table

From the truth table above, it is clear that when the value of CarryIn is not equal to the value of CarryOut, the overflow occurs. If overflow occurs, the sign bit is set with the value of the result. So, the sign bit can be wrong. Therefore, the overflow occurs when CarryIn is not equal to CarryOut of the most significant bit.