Question

Find the capacity, address, and data pins for the following memory organizations. (a) \(16 \mathrm{~K} \times 8 \mathrm{ROM}\) (b) \(32 \mathrm{~K} \times 8 \mathrm{ROM}\) (c) \(64 \mathrm{~K} \times 8 \mathrm{SRAM}\) (d) \(256 \mathrm{~K} \times 8 \mathrm{EEPROM}\) (e) \(64 \mathrm{~K} \times 8 \mathrm{ROM}\) (f) \(64 \mathrm{~K} \times 4\) DRAM (g) \(1 \mathrm{M} \times 8\) SRAM (h) \(4 \mathrm{M} \times 4\) DRAM (i) \(64 \mathrm{~K} \times 8 \mathrm{NV}-\mathrm{RAM}\)

Short answer

Capacities: (a) 131,072 bits, (b) 262,144 bits, (c) 524,288 bits, (d) 2,097,152 bits, (e) 524,288 bits, (f) 262,144 bits, (g) 8,388,608 bits, (h) 16,777,216 bits, (i) 524,288 bits. Address Pins: (a) 14 pins, (b) 15 pins, (c) 16 pins, (d) 18 pins, (e) 16 pins, (f) 16 pins, (g) 20 pins, (h) 22 pins, (i) 16 pins. Data Pins: (a) 8 pins, (b) 8 pins, (c) 8 pins, (d) 8 pins, (e) 8 pins, (f) 4 pins, (g) 8 pins, (h) 4 pins, (i) 8 pins.

Step-by-step solution

Understanding Memory Specifications

A memory's organization is typically expressed in the format of 'SIZE x DATA_WIDTH'. 'SIZE' denotes the number of addressable units, while 'DATA_WIDTH' refers to the number of bits each unit can store. The total storage capacity can be calculated by multiplying SIZE by DATA_WIDTH. The number of address pins can be found by taking the logarithm base 2 of the number of addressable units (since memory is usually addressed in binary). The number of data pins is the same as the DATA_WIDTH.

Calculating Capacity for (a) 16K x 8 ROM

The capacity is calculated by multiplying the size by the data width: Capacity = 16K x 8 bits. To convert 'K' to actual number, we remember that 1K = 1024. So, Capacity = 16 x 1024 x 8 bits = 131,072 bits.

Determining Address Pins for (a) 16K x 8 ROM

For the number of address lines, we use log base 2 of the number of addressable units (16K). Address lines = log2(16K) = log2(16 x 1024) = log2(16) + log2(1024) = 4 + 10 = 14 address pins.

Identifying Data Pins for (a) 16K x 8 ROM

The number of data pins is directly given by the DATA_WIDTH, which is 8 for this memory organization.

Repeating Calculation for Each Memory

We repeat the above steps similarly for the rest of the memory organizations (b) through (i). The number of address pins is always calculated with the log base 2 of the size (number of addressable units), and the number of data pins corresponds to the data width of each memory.

Key concepts

Addressable Memory Units

In computer systems, memory is organized into small storage units that can be individually accessed. These basic storage units are referred to as addressable memory units. Think of them as tiny boxes within a storage facility, where each box has its own unique number; only with that specific number, or 'address,' can you locate and access the box's content. In memory terms, each unit often holds one byte (8 bits) of data, and the address serves as a pointer to that byte.

An important factor is that the total number of these units determines how many unique addresses we need. For instance, a memory with 16K addressable units has 16 x 1024 (since 1K equals 1024) such 'boxes'. To navigate these units efficiently, computers use binary numbers, leading us to concepts like binary logarithms to determine the required number of address lines.

Data Width

Data width, also known as word size or bit width, represents the number of bits that can be processed or stored simultaneously in a given memory unit. In a way, this determines how wide the 'hallway' is to each box in our storage analogy. If each box (addressable unit) is larger, it can hold more data—akin to a wider hallway allowing more people to pass through at the same time.

For example, if the data width of a memory unit is 8 bits, that means each addressable unit can store up to 8 bits of information. This information directly affects the data pins on a memory chip - a memory with an 8-bit data width will have 8 data pins to transfer the data in and out of the memory.

Binary Logarithm

The binary logarithm is a mathematical concept that is particularly important when working with computer memory. It allows us to calculate the necessary number of address lines to access all the addressable units within a memory chip. Essentially, the binary logarithm (log base 2) of a number tells us how many times you need to multiply the number 2 to get that original number.

For example, if we take the binary logarithm of 1024 (which is 2 to the power of 10), the result is 10. This is because 2 raised to the power of 10 is 1024. In terms of memory addressing, if we have 1024 addressable memory units, and we know that addressing is done in binary, we would need 10 address lines to uniquely specify each unit. This is a fundamental concept in determining the layout and specifications of computer memory.

Storage Capacity Calculation

The storage capacity of a memory device is calculated by multiplying the number of addressable units (the 'SIZE') by the data width (the number of bits each unit can store). This gives us the total storage in bits. However, in practical terms, we usually talk about bytes, kilobytes (KB), megabytes (MB), and so on. Therefore, after calculating the total bits, we often convert to a higher unit for ease of understanding.

Let's run through an example by considering a memory with the organization of 16K x 8 bits. We first convert the 'K' (which stands for 'kilo') to its numerical equivalent, 1024. We then compute the storage capacity as follows: Capacity = 16 x 1024 units x 8 bits per unit, which equals 131,072 bits. To convert this to bytes (since 1 byte = 8 bits), we simply divide the number of bits by 8, yielding 16,384 bytes, or 16 KB.